MIPS Processor Simulator

Problem

As part of a second-year university coursework, I developed a simulator for a MIPS processor to model how machine-level instructions are executed within a CPU. The objective was to parse assembly instructions from a text input and simulate their progression through the processor datapath, including register updates, ALU operations, and memory interactions. This project aimed to bridge the gap between high-level programming and hardware execution by providing a concrete implementation of instruction-level behaviour and processor architecture.

Highlights

• Simulated a MIPS CPU datapath in software, including registers, ALU, and memory
• Modelled instruction execution lifecycle from fetch → decode → execute
• Represented key architectural components in C with clear abstractions